Design and implement a Systems-on-Chip (MPSoC) multiprocessor interconnected by a Networks-on-Chip (NoC)

Main Article Content

Wilson Mauricio Chicaiza
Daniel Gonzalo Verdesoto

Abstract

This document briefly characterizes the communication media used in multiprocessed architectures. The main objective of this characterization is to show a new communication model based on packet switching called Networks-On-Chip (NoC). This publication shows a network architecture called NoC Hermes, which was interconnected to a Multiprocessor-Systems-on-Chip (MPSoC) composed of four MicroBlaze processors. This connection was made thanks to the design and development of a Network Interface generated in VHDL code. The MicroBlaze processors could interact with the Hermes Switches through the Network Interface to create a multiprocessor architecture interconnected by a NoC. Another architecture of multiprocessors interconnected by buses was also created to make comparisons. A steganography application was developed for both architectures, in which two processors are multiprocessed and work simultaneously. Unfortunately, in this application, measuring the latency and energy consumption directly was impossible, so simulators were used to estimate these measurements.

Downloads

Download data is not yet available.

Article Details

How to Cite
Design and implement a Systems-on-Chip (MPSoC) multiprocessor interconnected by a Networks-on-Chip (NoC). (2013). MASKAY, 3(1), 40-48. https://doi.org/10.24133/maskay.v3i1.129
Section
TECHNICAL PAPERS

How to Cite

Design and implement a Systems-on-Chip (MPSoC) multiprocessor interconnected by a Networks-on-Chip (NoC). (2013). MASKAY, 3(1), 40-48. https://doi.org/10.24133/maskay.v3i1.129

Most read articles by the same author(s)

1 2 3 4 5 6 7 8 9 10 > >>